STEPLA-1 8-bit Hardwired CPU

A complete 8-bit Harvard architecture CPU designed and simulated in Logisim-Evolution, built entirely from individual logic gates down to the gate level.

Version: 2.4.2

Status: Under Development

What Is STEPLA-1?

STEPLA-1 is a fully functional 8-bit CPU where every component; registers, decoders, ALU, control unit is built from individual 74-series logic gates. No black box components. Every signal path is visible, traceable, and documented.

Unlike EEPROM-based designs, STEPLA-1 uses a fully hardwired control unit a gate-level AND/OR matrix where every control signal is a physical gate whose inputs you can probe with a multimeter.…