Menu

Post image 1
Post image 2
Post image 3
Post image 4
Post image 5
Post image 6
Post image 7
Post image 8
Post image 9
Post image 10
Post image 11
Post image 12
Post image 13
Post image 14
Post image 15
Post image 16
Post image 17
Post image 18
1 / 18
0

Designing an Ethernet Switch ASIC

Hacker News·Designing an Ethernet Switch ASIC·about 2 months ago
#x3mBaxTG
#essenceia#recent#before#physical#ethernet#as
Reading 0:00
15s threshold

AI disclosure: All bugs are 100% human made. It seems I have just built the world’s first open source switch ASIC and I am getting it back from the fab mid november. Switch floorplan render with area density view enabled, occupying 711.2 x 325 um of area. The first version of this chip is currently taped out on the Tiny Tapeout gf26b shuttle chip , part of the second wafer.space run. Silicon bring-up is expected to start 2026-11-15 . Here is its repository : Buckle up and welcome to the tale of more madness. Where are the open source networking ASICs? # Recent FCC decisions have put the central importance of networking equipment top of mind, and in doing so, have also put the total absence of any entirely open source networking equipment hardware at the top of my mind. Although Open Source Silicon is in its infancy we are currently seeing a number of projects being designed, tested, and for the most ambitious ones, even taped-out with some proven silicon already in the wild.…

Continue reading — create a free account

Join HashtagPLUS to read full articles, follow hashtags, vote, and join the conversation.

Read More